1. Field of the Invention
The present invention relates to a semiconductor chip to be applied to a chip-on-chip structure in which semiconductor chips are bonded to each other in a stacked relation and a flip-chip-bonded structure in which a semiconductor chip is bonded to a printed circuit board in a face-to-face relation. The invention further relates to a production method for such a semiconductor chip. The invention still further relates to a semiconductor device having a semiconductor chip bonded to a solid device (another semiconductor chip or an interconnection board).
2. Description of Related Art
For size reduction and higher integration of a semiconductor device, a so-called chip-on-chip structure, for example, is employed in which a plurality of semiconductor chips are bonded to one another in a face-to-face stacked relation.
In the chip-on-chip structure, as shown in FIG. 25, semiconductor chips 91, 92 opposed to each other are spaced a predetermined distance from each other and electrically connected to each other by a plurality of bumps 93 provided therebetween. The semiconductor chips 91, 92 thus stacked are sealed with a mold resin 94.
When the semiconductor chips 91, 92 are sealed with the mold resin 94, a relatively great pressure is applied to the semiconductor chips by the mold resin 94. Where the semiconductor chips 91, 92 are different in thermal expansion coefficient, strains occur in the semiconductor chips 91, 92 due to stresses exerted thereon when a relatively great amount of heat is applied thereto at the resin sealing. Thus, portions of the semiconductor chips 91, 92 not supported by the bumps 93 are deformed, resulting in deterioration of the characteristics of devices formed in the semiconductor chips 91, 92.
For electrical connection between the semiconductor chips 91 and 92, at least one of surface protective films covering the semiconductor chips is formed with openings through which portions of internal interconnections are exposed, and the bumps 93 are provided on the exposed portions of the internal interconnections. Therefore, the arrangement of the bumps 93 is restricted by the pattern of the internal interconnections and, in some cases, the bumps 93 are unevenly disposed on the surface of the semiconductor chip in accordance with the internal interconnection pattern. Where the bumps 93 are unevenly disposed on the surface thereof, for example, the chip 92 may be tilted on the underlying chip 91.
When the chips 91, 92 are bonded to each other, great stresses are exerted on bump connections. Therefore, the semiconductor substrate provided with the bumps 93 may suffer from a mechanical damage. For prevention of the damage, an attempt has been made to absorb the stresses by utilizing the resilient property of the electrical connection bumps. However, the absorption of the stresses is in sufficient, so that the substrate is damaged. This results in a lower yield.
Further, the substrate often suffers from warpage due to heat applied thereto at mounting of the semiconductor device, so that great stresses are exerted on the bump connections.
The afore said problems are associated not only with the semiconductor device of chip-on-chip structure, but also with a semiconductor device of so-called flip-chip-bonded structure in which a semiconductor chip is bonded to a printed circuit board in a face-to-face opposed relation.
It is a first object of the present invention to provide a semiconductor chip which is allowed to exhibit stable device characteristics by prevention of deformation thereof due to stress-strains and the like.
It is a second object of the invention to provide a semiconductor chip which is capable of relieving a stress applied thereto at the bonding thereof.
It is a third object of the invention to provide a semiconductor chip production method which allows an electrical connection portion (functional bump) and a dummy connection portion (dummy bump) to have substantially the same height.
It is a fourth object of the invention to provide a semiconductor device which features reliable connection between a semiconductor chip and a solid device, e.g., another semiconductor chip, and to provide a semiconductor chip for such a semiconductor device.
A semiconductor chip according to the present invention comprises: a semiconductor substrate; a functional bump provided on a surface of the semiconductor substrate for electrical connection between an internal circuit provided on the semiconductor substrate and a solid device; and a dummy bump provided on the surface of the semiconductor substrate and not serving for the electrical connection between the internal circuit and the solid device.
The dummy bump may be a stress relieving bump for relieving a stress applied thereto.
The solid device may be another semiconductor chip or an interconnection board.
The stress relieving bump may be provided in a semiconductor chip formation region or in a peripheral region surrounding the semiconductor chip formation region.
With this arrangement, the bump which does not have the originally intended bump function serves to absorb a shock at the bonding of the chip. Therefore, the substrate is prevented from being damaged at the bonding, so that the semiconductor chip production yield can be improved. During use, the bump connection relieves a stress exerted on the substrate, thereby ensuring the reliability of the semiconductor chip.
The functional bump may be provided on a peripheral portion of a mating surface opposed to the solid device. In this case, the dummy bump is preferably provided on a central portion of the mating surface.
With this arrangement, the central portion of the semiconductor chip can be supported by the dummy dump. Therefore, the deformation of the semiconductor chip can be prevented which may otherwise occur due to a mechanical pressure and a stress-strain. Thus, the semiconductor chip can exhibit stable device characteristics.
The dummy bump preferably has a greater contact area in contact with the solid device than the functional bump.
When the dummy bump is provided on the surface of the semiconductor chip, the dummy bump is preferably formed of the same material as the function bump which serves for electrical connection to another semiconductor chip opposed thereto. Thus, the formation of the dummy bump and the formation of the functional bump can be achieved in the same process step, whereby an increase in the number of the steps of a semiconductor chip production process can be prevented.
In this case, however, there is a problem that the functional bump and the dummy bump have different projection heights. As shown in FIG. 23, a bump material is selectively deposited on a surface protective film 193 formed with an opening 192 through which an interconnection 191 is partly exposed. Thus, a functional bump 194 and a dummy bump 195 are formed on the opening 192 and on the surface protective film 193, respectively. In this case, a portion of the surface protective film 193 around the opening 192 is raised with respect to the other portion, so that the functional bump 194 has a projection height which is greater by xcex94h than the dummy bump 195. With the functional bump 194 higher than the dummy bump 195, the dummy bump 195 cannot properly be brought into contact with another semiconductor chip when the semiconductor chip is mounted on the another semiconductor chip. Therefore, the dummy bump fails to satisfactorily exhibit its function.
Where the dummy bump and the functional bump are formed in the same process step, there is a level difference, as shown in FIG. 24, between the surface of a surface protective film 291 and the surface of an internal interconnection 293 exposed through an opening 292 formed in the surface protective film 291, so that the dummy bump denoted at 294 has a projection height which is greater by xcex94d than a projection height of the functional bump denoted at 295 as measured from the surface of the surface protective film 291. Where this semiconductor chip is employed as a primary chip or a secondary chip, the functional bump 295 cannot properly be bonded to a functional bump of another semiconductor chip because the dummy bump 294 has a greater projection height than the functional bump 295. Therefore, electrical connection between the semiconductor chips cannot be established.
In accordance with one embodiment of the invention, the dummy bump is connected to a low impedance portion. With this arrangement, although the dummy dump may serve as an antenna, there is no possibility that external noises are introduced into the semiconductor chip. Therefore, the semiconductor chip exhibits stable device characteristics.
The low impedance portion may be the semiconductor substrate which serves as a base of the semiconductor chip.
It is preferred that a connection portion of the low impedance portion of the semiconductor substrate has been subjected to a resistance reducing process. Thus, the resistance of the low impedance portion can be reduced, so that an adverse effect of the external noises can more effectively be prevented.
The dummy bump may be connected to a scribe line region of the semiconductor substrate. Where the dummy bump is comprised of a plating-metallization layer formed on a seed layer provided on the surface of the semiconductor substrate, the seed layer preferably has an interconnection extending from the dummy bump to a scribe line.
In general, no surface protective film is provided on the scribe line region, so that the surface of the semiconductor substrate is exposed. Therefore, the dummy bump can easily be connected to the semiconductor substrate by connecting the dummy bump to the scribe line region via the seed film in accordance with the present invention.
The semiconductor substrate may be covered with a planarized surface protective film, on which the functional bump and the dummy bump are provided as projecting therefrom.
The functional bump may electrically be connected to an internal interconnection via an opening formed in the surface protective film. In this case, it is preferred that the dummy bump is formed on the surface protective film as electrically isolated from the internal circuit.
The surface protective film may be formed with a recess having a depth which corresponds to a distance between a surface of the surface protective film and the internal interconnection, and the dummy bump may be provided on the recess. In this case, the depth of the recess is preferably determined so that the dummy bump has substantially the same projection height as the functional bump with respect to the surface of the surface protective film.
Thus, the electrical connection portion and the dummy connection portion have substantially the same projection height with respect to the surface of the semiconductor chip, even if the electrical connection portion and the dummy connection portion are formed in the same process step. Therefore, the electrical connection portion and the dummy connection portion can assuredly be connected to the surface of the solid device, whereby electrical connection between the semiconductor chip and the solid device can assuredly be established by the electrical connection portion and mechanical connection between the semiconductor chip and the solid device can assuredly be established by the electrical connection portion and the dummy connection portion.
Since the electrical connection portion and the dummy connection portion merely need to be formed as having the same height, the formation of the electrical connection portion and the dummy connection portion can easily be achieved in the same process step by plating or the like as in the prior art. Therefore, the semiconductor chip can be produced through a simplified process, as compared with a case where the electrical connection portion and the dummy connection portion are formed as having different heights to allow the electrical connection portion and the dummy connection portion to have substantially the same projection height.
Where the electrical connection portion is provided on the internal interconnection exposed through the opening formed in the surface protective film covering the semiconductor chip and the dummy connection portion is formed on the surface protective film, it is preferred that the recess is formed in the surface of the surface protective film and the recess has a depth which is virtually equal to a distance between the surface of the surface protective film and the surface of the internal interconnection.
The internal interconnection may have a surface portion which is exposed through the opening and is flush with the surface protective film, and the functional bump may be provided on the exposed surface portion. In this case, the functional bump and the dummy bump are allowed to have the same projection height merely by forming these bumps through the same process step.
In accordance with one inventive aspect, there is provided a semiconductor device, which comprises: a solid device; a semiconductor chip mounted and bonded onto a surface of the solid device; a functional bump for electrical connection between an internal circuit of the semiconductor chip and the solid device; and a dummy bump not serving for the electrical connection between the internal circuit and the solid device.
In accordance with another inventive aspect, there is provided a semiconductor device of a structure in which first and second solid devices are bonded to each other in a face-to-face opposed relation, at least one of the first and second solid devices being a semiconductor chip, the semiconductor device comprising: an electrical connection portion provided on a front face of the first solid device as projecting therefrom to join the first and second solid devices to each other with a predetermined distance therebetween and to electrically connect the first and second solid devices to each other; and a dummy connection portion provided on a front face of the second solid device as projecting therefrom to a projection height which is virtually equal to the predetermined distance, and not serving for the electrical connection between the first and second solid devices.
In accordance with the invention, the projection height of the dummy connection portion is virtually equal to the distance between the first solid device and the second solid device, so that the dummy connection portion can assuredly be bonded to the front face of the first solid device. Therefore, the electrical connection between the first and second solid devices can assuredly be established by the electrical connection portion, while mechanical connection between the first and second solid devices can assuredly be established by the electrical connection portion and the dummy connection portion.
It is preferred that the first solid device is not provided with any dummy connection portion which does not serve for the electrical connection between the first and second solid devices, and the second solid device is not provided with any electrical connection portion which joins the first and second solid devices to each other with the predetermined distance therebetween and electrically connects the first and second solid devices to each other. With this arrangement, the electrical connection portion and the dummy connection portion each having a predetermined height are formed on the first solid device and on the second solid device, respectively, so that the first and second solid devices can each be produced through a simplified process.
The second solid device may have a connection recess formed in the front face thereof in association with the electrical connection portion to receive a distal end portion of the electrical connection portion. In this case, the dummy connection portion preferably projects from the front face of the second solid device to a projection height which is virtually equal to a difference between a projection height of the electrical connection portion with respect to the front face of the first solid device and an insertion depth of the electrical connection portion in the connection recess.
More specifically, the projection height of the dummy connection portion with respect to the front face of the second solid device is virtually equal to the aforesaid predetermined distance, where the second solid device has the connection recess formed in the front face thereof in association with the electrical connection portion to receive the distal end portion of the electrical connection portion and the dummy connection portion has the projection height which is virtually equal to the difference between the projection height of the electrical connection portion with respect to the front face of the first solid device and the insertion depth of the electrical connection portion in the connection recess.
In accordance with further another inventive aspect, there is provided a semiconductor device of a structure in which first and second solid devices are bonded to each other in a face-to-face opposed relation, at least one of the first and second solid devices being a semiconductor chip, the semiconductor device comprising: a first electrical connection portion provided on a front face of the first solid device as projecting therefrom for electrical connection between the first solid device and the second solid device; a dummy connection portion provided on the front face of the first solid device as projecting therefrom and not serving for the electrical connection between the first and second solid devices; and a second electrical connection portion provided on a front face of the second solid device in association with the first electrical connection portion as projecting therefrom to a projection height which is virtually equal to a difference in projection height between the first electrical connection portion and the dummy connection portion as measured from the front face of the first solid device, and bonded to the first electrical connection portion for the electrical connection between the first and second solid devices.
Where the electrical connection portion is provided on an internal interconnection exposed through an opening formed in a surface protective film covering the semiconductor chip and the dummy connection portion is provided on the surface protective film, for example, the projection heights of the first electrical connection portion and the dummy connection portion with respect to the front face of the first solid device are different by a distance as measured from the surface of the surface protective film to the internal interconnection if the first electrical connection portion and the dummy connection portion have the same height. Therefore, the difference in the projection height is made up by providing the second electrical connection portion, whereby the first electrical connection portion and the second electrical connection portion can be bonded to each other when the dummy connection portion is brought into contact with the front face of the first solid device. Thus, the connection between the first solid device and the second solid device can assuredly be established.
Since it is merely necessary to form the first electrical connection portion and the dummy connection portion each having a predetermined height on the first solid device and to form the second electrical connection portion having a predetermined height on the second solid device, the first solid device and the second solid device can each be produced through a simplified process.
In accordance with one inventive aspect, there is provided a semiconductor chip production method for producing a semiconductor chip which is to be bonded to a surface of a solid device and includes an electrical connection portion provided on a front face thereof to be opposed to the surface of the solid device for electrical connection to the solid device and a dummy connection portion provided on the front face thereof and not serving for the electrical connection to the solid device, the method comprising the steps of: providing an internal interconnection on a semiconductor substrate which serves as a base of the semiconductor chip; forming a surface protective film over the internal interconnection; planarizing the surface protective film; forming an opening in the surface protective film to expose a portion of the internal interconnection; and forming an electrical connection portion connected to the internal interconnection via the opening and a dummy connection portion isolated from the internal interconnection by selective plating on the portion of the internal interconnection exposed through the opening and the planarized surface protective film after the surface protective film planarization step and the opening formation step.
In accordance with the invention, the electrical connection portion and the dummy connection portion can be formed as having the same height by thus performing the selective plating for the formation of the electrical connection portion and the dummy connection portion after the planarization of the surface of the surface protective film.
Therefore, the electrical connection portion and the dummy connection portion can properly be connected to the surface of the solid device. Thus, the electrical connection to the surface of the solid device can properly be established and, in addition, stresses exerted on the semiconductor chip and the surface of the solid device can advantageously be relieved by the dummy connection portion.
In accordance with another inventive aspect, there is provided a semiconductor chip production method for producing a semiconductor chip which is to be bonded to a surface of a solid device and includes an electrical connection portion provided on a front face thereof to be opposed to the surface of the solid device for electrical connection to the solid device and a dummy connection portion provided on the front face thereof and not serving for the electrical connection to the solid device, the method comprising the steps of: providing an internal interconnection on a semiconductor substrate; forming a surface protective film over the internal interconnection; exposing a surface of the internal interconnection from the surface protective film by planarizing the surface protective film by polishing; and forming an electrical connection portion connected to the surface of the internal interconnection exposed from the surface protective film and a dummy connection portion isolated from the internal interconnection by selective plating on the surface of the internal interconnection exposed from the surface protective film and the planarized surface protective film.
In accordance with the invention, the electrical connection portion and the dummy connection portion can be formed as having the same height by thus performing the selective plating for the formation of the electrical connection portion and the dummy connection portion after the internal connection is exposed by polishing the surface protective film.
Therefore, the electrical connection portion and the dummy connection portion can properly be connected to the surface of the solid device. Thus, the electrical connection to the surface of the solid device can properly be established and, in addition, stresses exerted on the semiconductor chip and the surface of the solid device can advantageously be relieved by the dummy connection portion.
The surface protective film polish-planarization step is preferably performed until the surface of the surface protective film becomes substantially flush with the surface of the internal interconnection exposed from the surface protective film.
In accordance with further another inventive aspect, there is provided a semiconductor chip production method for producing a semiconductor chip which is to be bonded to a surface of a solid device and includes an electrical connection portion provided on a front face thereof to be opposed to the surface of the solid device for electrical connection to the solid device and a dummy connection portion provided on the front face thereof and not serving for the electrical connection to the solid device, the method comprising the steps of: providing an internal interconnection on a semiconductor substrate; forming a surface protective film over the internal interconnection; planarizing the surface protective film; forming an opening for partly exposing the internal interconnection and a recess in the planarized surface protective film; forming a metal film over the surface protective film formed with the recess and the opening; and removing the metal film except portions thereof formed in the recess and the opening, whereby a dummy connection portion isolated from the internal interconnection and an electrical connection portion connected to the internal interconnection are formed in the recess and in the opening, respectively.
It is preferred that the step of forming the dummy connection portion and the electrical connection portion includes the step of polishing a surface of the metal film by a chemical mechanical polishing method, and the chemical mechanical polishing step is performed until the surface of the surface protective film becomes substantially flush with surfaces of metal film portions in the opening and the recess.
In accordance with the invention, the electrical connection portion and the dummy connection portion can be formed with the surfaces thereof being substantially flushed with the surface of the surface protective film by forming the recess and the opening in the planarized surface protective film, then forming the metal film on the surface protective film formed with the recess and the opening, and removing the metal film except the portions thereof formed in the recess and the opening for formation of the dummy connection portion and the electrical connection portion in the recess and in the opening, respectively.
Therefore, where the semiconductor chip is connected to a solid device having a functional bump and a dummy bump, for example, the functional bump and dummy bump of the solid device can properly be connected to the electrical connection portion and dummy connection portion, respectively, of the semiconductor chip. Thus, the electrical connection between the semiconductor chip and the solid device can properly be established and, in addition, stresses exerted on the semiconductor chip and the solid device can advantageously be relieved.